EUVL masks will be used in next generation lithography processes for making nanometer-scale semiconductor devices. The short EUV wavelength of 13.5 nm enables the creation of smaller devices than possible today with 513 nm lithography.
The lithography process may include exposing silicon wafers coated by photoresist to 13.5 nm wavelength radiation which is reflected from a pattern transfer area of the EUVL mask. The pattern which is located on the top surface of the pattern forming area of the mask is de-magnified and transferred onto the photoresist layer above the silicon wafer. After such an exposure, the lithography process continues. The developed photoresist is removed and a pattern is formed on the silicon by etch or deposition. The EUVL mask also includes a periphery area that may surround the pattern transfer area.
FIG. 1 illustrates an EUVL mask that is built from a non-conductive layer 12 (such as a glass layer) and an upper portion that may include a combination of (a) reflecting layers 14 which reflect the EUV light towards the substrate and (b) an absorbing layer 16. This upper portion is conductive and extends throughout the mask and especially throughout the pattern transfer area of the mask.
FIG. 1 also includes arrows 8 that represent EUVL radiation directed onto the mask and reflected from the mask.
The EUVL mask is positioned on a chuck 50. The chuck 50 may be electrically coupled (by cable 59) to a predetermined location of a known potential (such as the ground).
The EUVL mask must be inspected during its manufacturing and utilization processes. A defect on the top of the mask or a defect buried in the multi-layer stack (on areas which are not covered by the absorber), will cause repetitive defects on the exposed silicon wafers.